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| (R) ESDA6V1S3 ESDA6V2S6 TRANSILTM ARRAY FOR ESD PROTECTION Application Specific Discretes A.S.D.TM APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : - COMPUTERS - PRINTERS - COMMUNICATION SYSTEMS - GSM HANDSETS AND ACCESSORIES - OTHER TELEPHONE SETS FEATURES 18 UNIDIRECTIONAL TRANSILTM FUNCTIONS LOW LEAKAGE CURRENT: IR max. < 2 A 200 W PEAK PULSE POWER (8/20 s) SO20 ESDA6V1S3 SSOP20 ESDA6V2S6 DESCRITION The ESDA6xxSx is a monolithic voltage suppressor designed to protect componentswhich are connected to data and transmission lines against ESD. It clamps the voltage just above the logic level supply for positive transients, and to a diode drop below ground for negative transients. FUNCTIONAL DIAGRAM BENEFITS High ESD protection level : up to 25 kV High integration Suitable for high density boards COMPLIESWITH THE FOLLOWING STANDARDS : IEC 1000-4-2 : level 4 MIL STD 883C-Method 3015-6 : class3 (human body model) October 1998 Ed: 2A 1/7 ESDA6V1S3 / ESDA6V2S6 ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP PPP Tstg Tj TL Parameter Electrostatic discharge MIL STD 883C - Method 3015-6 Peak pulse power (8/20s) Storage temperature range Maximum junction temperature Maximum lead temperature for soldering during 10s Value 25 200 - 55 to + 150 150 260 Unit kV W C C C ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol VRM VBR VCL IRM IPP Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Voltage temperature coefficient Capacitance Dynamic resistance Forward voltage drop T C Rd VF Types VBR min. note1 V @ max. IR IRM max. note1 @ VRM Rd typ. note 2 T max. note 3 10 /C 6 6 -4 C typ. 0V bias pF 120 100 VF @ max. IF V 7.2 7.2 mA 1 1 A 2 2 V 5.25 5.25 0.5 0.5 V 1.25 1.25 mA 200 200 ESDA6V1S3 ESDA6V2S6 6.1 6.2 Note 1 : Between any I/O pin and Ground Note 2 : Square pulse, IPP = 25A for ESDA6V1S3 and I PP = 15A for ESDA6V2S6 , tp = 2.5s Note 3 : VBR = T * [Tamb-25] * VBR(25C) 2/7 ESDA6V1S3 / ESDA6V2S6 CALCULATION OF THE CLAMPING VOLTAGE USE OF THE DYNAMIC RESISTANCE The ESDA family has been designed to clamp fast spikes like ESD. Generally the PCB designers need to calculate easily the clamping voltage VCL. This is why we give the dynamic resistance in addition to the classical parameters. The voltage across the protection cell can be calculated with the following formula: VCL = VBR + Rd IPP WhereIpp is the peakcurrent throughthe ESDAcell. DYNAMIC RESISTANCE MEASUREMENT The short duration of the ESD has led us to prefer a more adapted test wave, as below defined, to the classical 8/20s and 10/1000s surges. I Ipp As the value of the dynamic resistance remains stable for a surge duration lower than 20s, the 2.5s rectangular surge is well adapted. In addition both rise and fall times are optimized to avoid any parasitic phenomenon during the measurement of Rd. 2s tp = 2.5s t 2.5s duration measurement wave. 3/7 ESDA6V1S3 / ESDA6V2S6 Fig. 1 : Peak power dissipation versus initial junction temperature. Ppp[Tj initial]/Pp[Tj initial=25C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 2000 1000 Fig. 2 : Peak pulse power versus exponential pulse duration (Tj initial = 25 C). Ppp(W) 100 Tj initial(C) 0 25 50 75 100 125 150 10 1 tp(s) 10 100 Fig. 3 : Clamping voltage versus peak pulse current (Tj initial = 25 C). Rectangular waveform tp = 2.5 s. Ipp(A) 50.0 tp=2.5s Fig. 4 : Capacitance versus reverse applied voltage (typical values). C(pF) 100 F=1MHz Vosc=30mV 10.0 50 1.0 20 VCL(V) VR (V) 10 1 2 5 10 0.1 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 Fig. 5 : Relativevariation of leakagecurrent versus junction temperature (typical values). IR[Tj] / IR[Tj=25C] 200 100 Fig. 6 : Peak forward voltage drop versus peak forward current (typical values). IFM(A) 5.00 Tj=25C 1.00 10 0.10 VFM(V) 100 125 0.01 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Tj(C) 1 25 50 75 4/7 ESDA6V1S3 / ESDA6V2S6 APPLICATION EXAMPLE : 1 - Protection of logic-level signals. (ex : centronics junction) 2 - Protection of symmetrical signals. Note : Capacitancevalue between any I/O pin and Ground is divided by 2. 0 to 5 V A1 +/- 2.5 V D1 D2 0 to 5 V A2 +/- 2. 5 V Dn 0 to 5 V A16 +/- 2.5 V Implementing its ASDTM technology,SGS-Thomson has developed a monolithic TRANSIL diode array, which is a reliable protection against electrostatic overloads for computer I/O ports, modems, GSM handsetsand accessories or other similar systems with data outputs. The ESDAxxSx integrates 18 TRANSIL diodes in a compact package that canbe easily mounted close to the circuitry to be protected, eliminating the assembly costs associated with the use of discrete diodes, and also increasing system reliability. Each TRANSIL has a breakdown voltage between 6.2V (minimum) and 7.2V (maximum). When the input voltage is lower than the breakdown voltage, the diodes present a high impedance to ground. For short overvoltage pulses, the fast-acting diodes provide an almost instantaneousresponse, clamping the voltage to a safe level. 5/7 ESDA6V1S3 / ESDA6V2S6 ORDER CODE ESDA 6V1 S 3 RL PACKAGING: RL = Tape and reel = Tube PACKAGE : 3 : SO20 6 : SSOP20 ESD ARRAY VBR min MARKING : Logo, date code TYPE ESDA6V1S3 ESDA6V2S6 MARKING E6V1S3 ESDA6V2S6 Packaging : Preferred packaging is tape and reel. PACKAGE MECHANICAL DATA SO20 (Plastic) DIMENSIONS REF. Millimeters Min. D hx45 Inches Typ. Max. 0.104 0.008 0.020 0.013 0.512 0.299 0.050 Typ. Max. Min. 2.65 0.092 0.20 0.004 0.51 0.013 0.32 0.009 13.0 0.484 7.60 0.291 1.27 A A1 2.35 0.10 0.33 0.23 12.6 7.40 A B e A1 K L C B C D E E H e H h L K 10.0 0.25 0.50 10.65 0.394 0.75 0.010 1.27 0.020 8 (max) 0.419 0.029 0.050 Weight : 0.55g. 6/7 ESDA6V1S3 / ESDA6V2S6 PACKAGE MECHANICAL DATA SSOP20 (Plastic) DIMENSIONS Millimeters Inches Min. A A2 A b D e k REF. L Typ. Max. 2.00 0.25 Min. Typ. Max. 0.079 0.010 A1 A1 E c A2 b c D E E1 e k L 1.51 0.25 0.10 7.05 7.60 5.02 0 0.25 0.30 2.00 0.059 0.079 0.35 0.010 0.012 0.014 0.35 0.004 8.05 0.278 8.70 0.299 0.014 0.317 0.343 0.026 10 0 10 0.80 0.010 0.020 0.031 20 11 E1 1 10 6.10 0.65 0.50 6.22 0.198 0.240 0.245 Weight : 0.18g. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com 7/7 |
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